Modern printed circuit boards are no longer passive mechanical carriers for electronic components. In high-speed digital systems, networking equipment, servers, storage platforms, telecommunications hardware, automotive electronics, radar systems, and advanced computing platforms, the PCB itself becomes an important part of the electrical transmission system. As signaling speeds increase, structures that were once electrically insignificant can become major sources of reflection, loss, resonance, and timing uncertainty.
One of these structures is the unused portion of a plated through-hole.
A conventional plated through-hole may connect several layers even though the actual signal only needs to travel between two or three of those layers. The remaining copper-plated section below or above the active signal path is commonly referred to as a via stub. At relatively low frequencies, this unused section may have little visible influence on system operation. At high data rates, however, the stub behaves as a discontinuity in the transmission path. It can introduce reflections and resonant effects that become increasingly difficult to tolerate as the signal rise time becomes shorter.
Back drilling provides a practical manufacturing solution. Instead of redesigning the entire interconnection architecture around blind vias, buried vias, or HDI structures, the manufacturer mechanically removes the unused portion of a plated through-hole from one side of the PCB. The result is a shorter electrical discontinuity and, when correctly executed, a significant improvement in high-speed signal behavior.
However, the effectiveness of this process depends heavily on drilling depth. Removing too little material leaves an unnecessarily long residual stub. Removing too much material can approach or damage an adjacent functional layer, compromise dielectric integrity, reduce structural reliability, or create unacceptable manufacturing variation. This makes depth control one of the most important engineering considerations in back-drilled PCB production.

Back drilling depth control
Back drilling depth control refers to the controlled management of the secondary drilling depth used to remove the unused portion of a plated through-hole while preserving the functional layers, dielectric material, copper structures, and mechanical integrity of the PCB.
A typical back-drilling process begins with a conventional through-hole. The hole is drilled through the required board stack-up and subsequently plated so that the copper barrel forms an electrical connection between designated layers. If the signal does not require the complete barrel, the unused portion becomes a stub.
During back drilling, a second drill, generally larger than the original plated hole, enters from the appropriate PCB surface and removes the unused section of the plated barrel. The drilling operation intentionally stops within the multilayer stack rather than passing completely through the board.
The purpose of depth control is to establish a predictable endpoint.
That endpoint must be deep enough to remove the majority of the unwanted stub, but shallow enough to prevent interference with the next active layer or other critical internal structures. The manufacturer therefore has to consider the actual pressed board thickness, copper thickness, dielectric thickness, drill registration, machine capability, tooling condition, and stack-up tolerance.
An IPC technical presentation on backdrilling highlights several of these difficulties, including secondary-drill positional accuracy, board-thickness consistency, depth-control accuracy, burr formation, and the possibility of damaging copper at the bottom of the back-drilled region. It also emphasizes that insufficient depth can leave signal-integrity problems while excessive depth can damage the next signal layer.
Suppose a design specifies that the secondary drill should stop a certain distance above an internal copper layer. That nominal distance is based on the intended stack-up. The actual manufactured board, however, can have variations resulting from laminate thickness tolerance, resin flow, copper distribution, pressing conditions, and dimensional changes during fabrication. If the design margin is too small, a process that appears correct in the CAD environment may become risky in production.
Consequently, depth control should be treated as a tolerance-management problem rather than a single numerical setting.
The main reason for controlling the drilling depth is electrical performance.
A via stub is an electrically inactive section only from the perspective of the intended signal route. Electromagnetically, it remains part of the physical conductor structure. When a fast signal reaches the via transition, energy can couple into the unused portion of the barrel.
The longer the stub is relative to the signal’s electrical wavelength, the more significant its effect can become.
At high frequencies, the stub can behave like a transmission-line discontinuity. Depending on its dimensions, surrounding dielectric environment, termination conditions, and signal spectrum, it may contribute to reflections, resonance, insertion-loss degradation, return-loss degradation, and waveform distortion.
This is particularly important because modern digital interfaces are defined not simply by their nominal clock frequency but by their edge rates. A system operating at a moderate fundamental frequency can still contain very high-frequency spectral components if its rise and fall times are extremely fast.
The basic mechanism is straightforward.
A plated through-hole extends through multiple layers. The signal may enter on one layer and exit on another. The remaining section of the plated barrel beyond the signal layer does not contribute to the desired electrical connection.
A larger secondary drill is then used to remove the unwanted barrel from the rear side.
For example, imagine a 16-layer board in which a high-speed signal travels from an upper layer to an inner layer. A conventional through-hole may extend through all 16 layers. The signal uses only the upper portion of that structure. The lower portion becomes an unused stub.
Back drilling removes the lower barrel.
After the operation, the physical structure resembles a shortened via rather than a full through-hole. The remaining barrel continues to provide the intended connection, while the removed section no longer acts as a substantial electrical resonator.
The quality of this result depends strongly on the amount of residual stub left behind.
If the drill stops too early, the residual stub may remain long enough to affect the signal. If the drill penetrates too deeply, the process may approach another copper layer, damage dielectric material, or create an unacceptable structural condition.
This is why the ideal process is not simply maximum material removal.
Instead, the target is controlled material removal with a specified residual stub and process margin.
| Technology | Main Advantage | Main Limitation |
|---|---|---|
| Through-hole via | Low cost and simple | Long potential stub |
| Back-drilled via | Removes unused barrel | Requires controlled drilling |
| Blind via | Short electrical path | More complex fabrication |
| Buried via | Excellent routing flexibility | Higher manufacturing cost |
| Microvia | Very compact | Requires advanced HDI processes |
| Via-in-pad | Excellent package escape | Filling/planarity requirements |
There is no universally superior technology.
The appropriate choice depends on electrical requirements, layer count, routing density, component pitch, reliability targets, and budget.
Back drilling is one of the most practical techniques for improving high-speed PCB interconnect performance without completely abandoning conventional through-hole architecture. Its value comes from a simple physical principle: an unused section of plated through-hole can behave as an electrical discontinuity, and removing that section can reduce the associated signal-integrity penalty.
However, the effectiveness of the technique depends heavily on how precisely the secondary drilling depth is controlled.
The process must balance two competing objectives. On one side is electrical performance: the residual stub should be sufficiently short to minimize unwanted reflection and resonance. On the other side is manufacturing reliability: the drill must stop with enough margin to avoid damaging functional copper or compromising the multilayer structure.
This makes controlled-depth drilling a multidisciplinary problem involving PCB design, stack-up engineering, signal integrity, mechanical fabrication, CAM programming, machine capability, tooling, inspection, and quality assurance.
The most important cost factors include additional drilling time, specialized equipment, tooling, programming, inspection, engineering validation, and potential yield loss. These costs should not be considered in isolation. They need to be compared with the value of improved channel performance and the potential cost of failing high-speed electrical validation.
The impact on PCB performance can be significant when the original via stub is electrically long enough to interfere with the signal. Properly executed drilling can reduce discontinuity, improve return loss, reduce resonance, increase channel margin, and contribute to cleaner eye diagrams. At the same time, poor depth control can create entirely different problems, including excessive residual stubs, internal-layer damage, burrs, and reliability concerns.
My overall recommendation is therefore to treat the process as an electrical-manufacturing optimization rather than simply an additional drilling operation.
The best design is not necessarily the one with the smallest theoretical stub. It is the one that provides sufficient signal-integrity improvement while maintaining a realistic manufacturing window, stable production yield, predictable reliability, and reasonable cost.
For complex high-speed PCB projects, designers should involve the PCB manufacturer early. A supplier such as SQ PCB can be considered for customized multilayer PCB projects where drilling, stack-up, copper thickness, and specialized fabrication requirements must be coordinated. The final decision should always be based on demonstrated manufacturing capability, inspection methods, and engineering support.
As signaling speeds continue to increase, the importance of three-dimensional PCB structures will become even greater. Via geometry, reference-plane transitions, dielectric thickness, copper profile, and residual stubs will increasingly need to be considered as part of the complete signal channel.
Back drilling is therefore unlikely to become less relevant. Instead, it will become one element of a broader design philosophy in which PCB geometry, manufacturing tolerance, and electrical performance are optimized together.
It is the controlled management of the secondary drilling depth used to remove the unused portion of a plated through-hole. The objective is to shorten the residual via stub while maintaining sufficient distance from functional internal copper layers. The process requires control of drilling depth, drill diameter, board thickness, registration, tool condition, and stack-up tolerance.
An unused via stub can behave as an electrical discontinuity and may contribute to reflection, resonance, insertion-loss degradation, return-loss degradation, and waveform distortion. Removing most of the unused barrel reduces the physical discontinuity and can improve high-speed channel performance. IPC technical material specifically identifies unused via length as a potential high-frequency signal-integrity problem.
If the secondary drilling operation stops too early, an excessive residual stub remains. The physical barrel may still create unwanted electrical effects, reducing the effectiveness of the back-drilling process. In a high-speed design, this can contribute to reflection, resonance, and reduced signal-integrity margin.
Over-drilling can approach or damage an internal signal layer, power plane, ground plane, or other copper feature. It can also affect dielectric integrity and reduce PCB reliability. Therefore, the deepest possible drilling depth is not automatically the best solution. A controlled process window with sufficient safety margin is preferable.
No. The necessity depends on the signal rise time, operating spectrum, via geometry, stub length, stack-up, channel budget, and system-level signal-integrity requirements. If simulation or measurement shows that the existing via structure provides sufficient margin, the additional fabrication cost may not be justified. Conversely, interfaces with electrically significant stubs can benefit substantially from the process.
Connect to a Jerico Multilayer PCB engineer to support your project!
Request A Quote