At its core, Loss Tangent (also referred to as dissipation factor or tan δ) is a dielectric material parameter that quantifies how efficiently electromagnetic energy is stored versus how much is dissipated as heat. The parameter originates from the classical representation of a dielectric as having two forms of permittivity:
Real permittivity (ε′): Represents energy storage
Imaginary permittivity (ε″): Represents energy loss inside the dielectric
From the physics viewpoint, the parameter provides a window into molecular behavior. All dielectric materials exhibit molecular dipoles that respond to changing electric fields. When signals operate at low frequencies, the dipoles can follow the field with minimal energy lag. However, at high frequencies, molecular relaxation delay becomes significant, and the inability of dipoles to reorient instantly results in heat generation and attenuation. Loss Tangent quantifies that phenomenon with a single scalar value.
Engineers working with high-speed digital, RF, or millimeter-wave systems must understand the influence of this parameter. Attenuation in a PCB trace is usually composed of:
Conductor loss
Dielectric loss
Radiation loss (minor in tightly controlled routing)
As data rates increase beyond 10 Gb/s, and especially above 20–56 Gb/s PAM-4 systems, dielectric loss becomes one of the dominant contributors. The Loss Tangent provides a direct indicator of dielectric loss magnitude. Materials with lower values produce less signal amplitude decay per unit length.
In practice:
FR-4 materials have moderate Loss Tangent values (~0.015–0.020)
Mid-loss materials fall near 0.008–0.012
Low-loss materials used in high-end networking equipment fall near 0.001–0.005
Ultra-low-loss materials for mmWave applications may reach 0.0005 or lower
These differences define whether a designer can maintain timing margins or compensate via equalization, retimers, and additional layers of signal conditioning.
While it is common to treat low Loss Tangent as merely academic, the real-world benefits extend deeply across system performance:
Signals maintain amplitude over longer distances, particularly relevant for high-layer-count backplane or server motherboards.
Cleaner pulse shape means fewer eye-diagram distortions, helping ensure compliance with standards like PCIe, HDMI, DisplayPort, and 56G/112G SerDes.
Lower dielectric loss means sharper edges and more predictable propagation delay.
In RF circuits, a lower Loss Tangent improves Q-factor, reduces insertion loss, and enhances filter or antenna performance.
Because attenuation is lower, systems require less output power amplification, benefiting thermal management.
These advantages collectively highlight how Loss Tangent influences system behavior far beyond the trace level.
Loss Tangent
In high-speed and high-frequency transmission environments, attenuation is one of the most destructive phenomena affecting reliability, timing, and data fidelity. Even when copper roughness has been optimized and trace impedance has been meticulously controlled, Loss Tangent remains a persistent mechanism that continuously eats away at signal energy.
This relationship highlights two truths:
At higher frequencies, dielectric loss becomes significantly more dominant.
Loss Tangent directly controls the ratio of energy stored versus energy dissipated.
In practical systems:
A PCB operating at 1 GHz may show merely mild attenuation on FR-4.
The same PCB operating at 10–28 GHz may experience severe amplitude loss, excessive insertion loss, and eye closure if the Loss Tangent is not sufficiently low.
This is why high-speed system architects developing 56G PAM-4 or 112G SerDes links typically characterize transmission line loss budgets with precise attention to dielectric-loss contribution. Even minor deviations in material performance can lead to link failure over long channels.
One of the most useful engineering viewpoints is to evaluate how Loss Tangent directly limits the maximum usable trace length for a given signaling standard. Each high-speed protocol—such as SAS-4, PCIe Gen5/Gen6, USB4, or Ethernet 112G—has a specified insertion loss budget.
For example:
PCIe Gen5 allows a total channel loss around 28 dB at the Nyquist frequency.
If the selected laminate has a relatively high Loss Tangent, a designer may only support 6–8 inches of routing.
With a low-loss laminate, the same system might support 18–24 inches or more.
This is a dramatic increase in layout freedom. It also influences architectural decisions such as:
Whether retimers are needed
Whether SERDES channels must be relocated on the board
Whether stacking and via transitions can be simplified
How backplane connector design must be optimized
In other words, the Loss Tangent indirectly determines how complex or simple the entire board can be.
Although dielectric materials are often discussed in the context of attenuation, Loss Tangent also affects crosstalk dynamics. Higher dielectric loss tends to reduce far-end crosstalk by dissipating energy; however, this benefit comes at a high price—sharper signal attenuation.
Conversely, very low-loss materials preserve more energy, which also means:
Long-range coupling effects can become more pronounced
Designers must pay more attention to spacing, differential gaps, and reference-plane integrity
More rigorous 2D/3D field simulation is often required
In my own design experience, low-loss materials improve performance in every measurable way except one: layout discipline must be stricter. This is a reasonable trade-off given the benefits, but it reinforces the idea that selecting materials with optimal Loss Tangent should always go hand-in-hand with careful routing strategies.
Eye diagrams are one of the most visual and intuitive representations of how a communication channel behaves. A lower Loss Tangent directly improves:
Eye height
Eye width
Edge clarity
Jitter distribution
Timing margin
Why? Because dielectric loss reduces the high-frequency components of a signal more severely than low-frequency components. The result is waveform “rounding,” slower edge transitions, and jitter accumulation. Even if equalization techniques (CTLE, DFE, FFE) are applied at the receiver, the fundamental loss cannot be fully reversed.
In systems like 112G PAM-4, this becomes extremely critical because PAM-4 uses multiple amplitude levels, making it more sensitive to attenuation and noise.
One important nuance often overlooked by engineers is that Loss Tangent is NOT always constant across frequency. Certain materials exhibit:
Rising Loss Tangent at high GHz
Stable Loss Tangent across a broad band
Nonlinear changes near molecular relaxation frequencies
This is especially problematic when:
Designing wideband RF transceivers
Supporting multi-GHz clocking on server motherboards
Building mmWave systems above 30 GHz
Engineers must therefore examine the manufacturer’s frequency-dependent Loss Tangent curves rather than relying on a single room-temperature value. This is where material suppliers like Panasonic, Rogers, Isola, and Shengyi differentiate their products.
Dielectric loss converts energy into heat. A laminate with a higher Loss-Tangent will naturally produce more internal heating when subjected to RF power or continuous high-speed switching. This leads to:
Temperature rise in localized regions
Variation of Dk and therefore impedance drift
Additional margin consumption due to thermally induced loss changes
Accelerated material aging or chemical degradation
High-reliability applications such as automotive ADAS, aerospace radar, and communication infrastructure cannot tolerate such thermal drift.
Understanding the deeper origins of Loss Tangent requires moving beyond circuit-level reasoning and entering the domain of molecular motion. Dielectric materials used in PCBs—whether epoxy-based, PTFE-based, or hydrocarbon-ceramic blends—are composed of molecular structures whose dipoles constantly attempt to align with applied electric fields.
When a high-speed signal propagates, the alternating electric field forces dipoles to oscillate. However, molecular structures have:
inertia
friction
internal bonding constraints
relaxation time constants
These characteristics determine how quickly dipoles can follow the changing electric field.
Relaxation time—often denoted τ—is the period required for a dipole to reorient in response to a changing electric field. When signal frequency exceeds the dipole relaxation rate, the dipole cannot follow the oscillations. Instead, it “slips,” causing:
delayed polarization
internal heat generation
increased dielectric absorption
This manifests as an increase in Loss Tangent at certain frequencies.
Most PCB materials exhibit:
relatively stable Loss Tangent at lower GHz
rising Loss Tangent at higher microwave frequencies
rapid changes near molecular resonance bands
This is why engineers designing boards for 5G (28 GHz), 60 GHz wireless communication, or mmWave radar (77 GHz) must evaluate complete dispersion charts—not merely room-temperature datasheet values.
If one only considers a laminate’s Loss Tangent at 1 MHz or 1 GHz, they may misjudge its real behavior at 28 GHz or 40 GHz.
Resin formulation is arguably the strongest contributor to Loss Tangent. Let’s examine several resin systems commonly used in advanced PCBs:
Moderate Loss Tangent (≈0.015)
High polarity
Strong molecular dipole character
Economical and widely available
Reduced polarity due to chemical additives
Lower Loss Tangent (≈0.008–0.012)
Better stability for 10–20 GHz systems
Non-polar
Good mechanical strength
Loss Tangent ≈0.003–0.005
Suitable for RF/microwave designs
Ultra-non-polar
Loss Tangent ≈0.0005–0.002
Ideal for millimeter-wave systems
More difficult to fabricate
Each resin system represents a different trade-off in electrical, mechanical, and manufacturing performance. Importantly, engineers often underestimate how much resin chemistry influences long-channel performance.
Many engineering teams traditionally begin PCB development with schematic design, followed by stack-up creation and routing. In high-speed projects, this process flow can be risky because Loss-Tangent fundamentally limits what the system can achieve. If the attenuation budget is already tight, no amount of routing refinement can compensate for a laminate whose dielectric properties are inadequate.
Thus, in modern high-speed architecture planning, Loss Tangent must be evaluated during:
System definition
Interface budgeting
SerDes channel planning
Selection of connectors and cables
Backplane or midplane design
In my engineering experience, failure to consider Loss Tangent early often forces teams into crisis mitigation later—adding retimers, shortening channels, or completely revising the board layout.
A PCB stack-up defines not only layer count but also:
material classes
resin content
copper weights
dielectric thickness
routing layer assignments
Stack-up optimization in high-frequency designs aims to satisfy:
Attenuation goals
Impedance control
Crosstalk management
Power delivery integrity
Cost constraints
Loss Tangent directly influences item 1 and indirectly affects all others. For example:
Choosing a laminate with lower Loss Tangent enables thinner dielectrics without excessive attenuation
It enables routing on more layers because multiple transitions do not accumulate excessive loss
It increases the margin for differential impedance control
A common misconception is that switching from FR-4 to mid-loss materials automatically fixes attenuation problems. In reality, stack-up must be re-optimized to fully exploit the lower Loss Tangent.
| Application Type | Priority Level of Low Loss Tangent | Notes |
|---|---|---|
| 28–56 Gbps digital | High | Strongly impacts eye margins |
| 112 Gbps PAM-4 | Very High | Requires ultra-low-loss materials |
| 5G FR1 systems | Medium | Often acceptable up to LT ≈ 0.005 |
| 5G FR2/mmWave | Extremely High | Even LT = 0.003 may be insufficient |
| Automotive radar | Extremely High | Stability across temperature cycles is critical |
| General consumer electronics | Low | Cost and manufacturability dominate |
| Aerospace/satellite RF | Extremely High | Loss and phase stability are mission-critical |
High-frequency PCB design is often described as a balancing act between electrical performance, manufacturability, and cost, but beneath all these trade-offs lies one parameter that quietly governs signal integrity: the loss tangent. While dielectric constant typically receives more attention during material selection, it is the loss-related behavior that ultimately determines whether a design truly performs as expected when pushed into multi-gigahertz territory.
Throughout this article, we explored how subtle variations in material dissipation can reshape insertion loss, timing margin, skew uniformity, and EMI behavior. Designers often underestimate how quickly loss accumulates as frequency increases or as trace length grows across multilayer boards. However, a deeper understanding of material polarization, dielectric relaxation, and high-frequency energy propagation reveals why the loss tangent deserves far more consideration than it usually receives.
The growing shift toward ultra-high-speed interfaces such as 56G/112G PAM-4 SerDes, advanced RF modules, and mmWave applications has materially changed the priority structure of PCB design. In the past, optimizing crosstalk or layer stacking techniques might have been enough, but modern designs depend heavily on the underlying dissipation characteristics of the laminate itself. Materials with ultralow dissipation factors have transitioned from luxury to necessity. This makes long-term reliability, thermal stability, resin chemistry, and copper-roughness control intrinsic to meaningful performance optimization.
My personal view is that many designers still rely too heavily on simulation tools without fully appreciating the physics inside the dielectric. Simulators can model the behavior, but understanding why certain materials degrade more quickly or interact poorly with copper roughness provides a strategic advantage. As the industry continues pushing the boundaries of speed, loss tangent literacy will become a must-have engineering skill rather than a specialized knowledge area.
Ultimately, selecting the right PCB material is not about achieving the lowest possible dissipation factor, but about choosing a stable, predictable, manufacturable, and cost-appropriate laminate whose loss characteristics align with application-level requirements. When designers begin thinking from that perspective, high-speed PCB design shifts from intuition-driven to physics-driven, improving both performance and long-term reliability.
The key reason is to minimize dielectric-related attenuation that degrades signal amplitude, eye-diagram clarity, and timing margin. At high frequencies, even small increases in dielectric loss can lead to significant insertion-loss penalties across long trace lengths.
Not necessarily. Extremely low-loss materials can be more expensive, harder to fabricate, and sometimes mechanically fragile. The optimal dissipation factor depends on the application’s data rate, routing length, manufacturing constraints, and budget.
Dielectric constant influences impedance and propagation delay, while loss tangent directly affects signal attenuation. For high-speed and RF applications, loss tangent often plays a more dominant role because attenuation limits system reach and overall performance.
They affect insertion loss in complementary ways. Higher copper roughness increases conductor loss, and if combined with a poor loss tangent, total high-frequency loss rises sharply. Low-profile copper helps mitigate this interaction.
Yes, but only if material models are accurate. Many PCB stackups use rough or incomplete dielectric data. For precise simulation, frequency-dependent loss models such as Djordjevic-Sarkar or multi-pole Debye are strongly recommended.
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